Integrated circuits are very complex devices that include multiple layers. Each layer may include conductive material, isolating material while other layers may include semi-conductive materials. These various materials are arranged in patterns, usually in accordance with the expected functionality of the integrated circuit. The patterns also reflect the manufacturing process of the integrated circuits.
Integrated circuits are manufactured by complex multi-staged manufacturing processes. During this multi-staged process resistive material is (i) deposited on a substrate/layer, (ii) exposed by a photolithographic process, and (iii) developed to produce a pattern which defines some areas to be later etched.
Resistive materials are usually selected such as to be responsive to a light at a predefined narrow range of frequencies (wavelengths). A commonly utilized resistive material is responsive to 193 nm light emitted from ArF light sources. This resistive material is referred to as 193 nm resist.
Various inspection and failure analysis techniques have evolved for inspecting integrated circuits both during the fabrication stages, between consecutive manufacturing stages, either in combination with the manufacturing process (also termed “in line” inspection techniques) or not (also termed “off line” inspection techniques). Various optical as well as charged particle beam inspection tools and review tools are known in the art, such as the VeraSEM™, Compluss™ and SEMVision™ of Applied Materials Inc. of Santa Clara, Calif..
Manufacturing failures may affect the electrical characteristics of the integrated circuits. Some of these failures result from unwanted deviations from the required dimensions of the patterns. A “critical dimension” is the width of a patterned line or the distance between two patterned lines.
One of the goals of the inspection process is to determine whether the inspected wafer includes deviations from these critical dimensions. This inspection is usually done by charged particle beam imaging that provides the high resolution required to measure said deviations.
Various resistive materials are also responsive to charged particle beams, such as electrical beams emitted during a Scanning Electron Microscope (SEM) imaging. The 193 nm resist shrinks as a result of an interaction with the electron beam. The shrinkage is due to both quantum effects (breaking of chemical bonds) and localized heating effects. Thus, SEM imaging causes an unwanted change in the pattern imprinted upon a semiconductor.
Modern masks (also referred to as reticles) are used to generate integrated circuit patterns. Due to the very small dimensions of integrated circuit features the optical proximity correction (OPC) technique was developed. OPC involves adding various features to the mask such as to cause the required pattern to be printed. The two most common applications for OPC are linewidth differences between features in regions of different density (e.g., center vs. edge of an array, or nested vs. isolated lines), and line end shortening (e.g., gate overlap on field oxide). For the former case, scattering bars (sub-resolution lines placed adjacent to resolvable lines) or simple linewidth adjustments are applied to the design. For the latter case, “dogear” (serif or hammerhead) features are attached to the line end in the design.
In order to validate that the implementation of the OPC technique succeeded in providing the required pattern a large number of critical dimension measurements should be executed.
There is a need to perform OPC validation measurements without shrinking the measured resist.